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ASIC/FPGA Verification Engineer
Job Order #15839
San Jose, California - Added Mar 5, 2019

Full Description:

FPGA Verification Engineer


ASIC and FPGA Engineers!

Are you interested in verifying the design and implementation of the industry’s leading network monitoring devices? Can you develop and integrate designs into UVM environments?


Our client is looking for an FPGA/ASIC Verification Engineer that can:

- Generate reports providing coverage and test results

- Verify the design, architecture, golden models and micro-architecture using advanced verification methodologies

- Work with architects, designers, hardware, and software teams to accomplish tasks

- Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies.

- Experience in crafting test bench environments for unit and system level verification

- Perl and C/C++ programming language experience desirable

- Expertise in System Verilog

- Bachelor’s or Master’s Degree in Engineering (BSEE/MSEE), BSCS, or BSCE, with at least 3+ years of relevant experience


Please send your most up to date resume to Edgar at Please reference JO# 15839


Mainz Brady Group provides technology staffing solutions to the best known companies in Software Development, Finance, Electronics/Manufacturing, Retail, R&D, Services, Biotechnology, Healthcare and Telecommunications.

We specialize in Information Technology, Technical Sales and Marketing Staffing on a Contract, Contract to Hire, and Direct Hire basis.

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