Functional Verification Application Engineering Support
Hardware Design & Verification Engineer – ASIC/FPGA
Summary:
We’re seeking a talented Hardware Design & Verification Engineer to join a high-impact team supporting complex ASIC/FPGA projects.
You’ll work directly with engineering teams to deploy advanced functional verification solutions, helping customers maximize productivity and influence product direction.
Key Responsibilities:
-
Support RTL verification and simulation flows using SystemVerilog/UVM
-
Deliver technical training and collaborate with R&D on tool enhancements
-
Troubleshoot functional verification issues and contribute to documentation
-
Engage directly with customers to optimize RTL power and formal verification usage
-
Influence product development based on real-world customer feedback
Top Requirements:
-
Solid experience in ASIC/FPGA RTL design using VHDL, Verilog, or SystemVerilog
-
Proficiency with C/C++ and Object-Oriented Programming in a verification context
-
Hands-on knowledge of UVM, constrained-random testing, and simulation tools
-
BS in EE/CE required; MS preferred
-
Strong communication and customer-facing skills
Mainz Brady Group is a technology staffing firm with offices in California, Oregon, Washington and Texas. We specialize in Information Technology and Engineering placements on a Contract, Contract-to-hire and Direct Hire basis. Mainz Brady Group is the recipient of multiple annual Excellence Awards from the Techserve Alliance, the leading association for IT and engineering staffing firms in the U.S.
Mainz Brady Group is an Equal Opportunity Employer. We are committed to Diversity & Inclusion and incorporate non-discrimination best practices in all our staffing processes. Mainz Brady Group does not discriminate based on race, color, religion, sex, sexual orientation, gender identity, gender expression, age, disability or any other protected class.
